Electrical and Computer Engineering 560L:

Digital System Design (4.0 units)

Hardware System Design and implementation, FPGAs, HDL design, timing, FIFOs, Cache, CAMs, SSRAMs, OoO/multi-threaded CPU design, cache coherency, clock-domain crossing, bus protocols. Prerequisite: EE 457.
  • Prerequisite: EE 457
  • Note: Register for one lecture and lab
SectionSessionTypeTimeDaysRegisteredInstructorLocationSyllabusInfo
30460D906Lecture2:00-4:20pmMon, Wed38 of 45Gandhi PuvvadaZHS252notefeesession dates
30462D906Lecture4:30-6:50pmTue, Thu39 of 45Gandhi Puvvadafeesession dates
30464R906Lab2:30-3:50pmTuesday77 of 90session dates
4:30-5:50pm
Friday
Information accurate as of September 23, 2020 11:00 am.
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